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dc.contributor.authorSohiful Anuar, Zainol Murad, Dr.
dc.contributor.authorMukhzeer, Mohamad Shahimin, Dr.
dc.contributor.authorPokharel, Ramesh Kumar, Prof.
dc.contributor.authorKanaya, Haruichi, Assoc. Prof.
dc.contributor.authorYoshida, Keiji, Prof
dc.date.accessioned2013-08-14T08:58:00Z
dc.date.available2013-08-14T08:58:00Z
dc.date.issued2012-04
dc.identifier.citationMicrowave and Optical Technology Letters, vol. 54(4), 2012, pages 923-925en_US
dc.identifier.issn0895-2477
dc.identifier.urihttp://onlinelibrary.wiley.com/doi/10.1002/mop.26711/abstract;jsessionid=B23F1D81F32DDF4857C6BE83C17CE68E.d01t01
dc.identifier.urihttp://dspace.unimap.edu.my/123456789/27443
dc.descriptionLink to publisher's homepage at http://onlinelibrary.wiley.com/en_US
dc.description.abstractThis letter presents linearity improvement up-conversion mixer at 5.2 GHz for wireless applications. The design is based on Gilbert-cell active double-balanced mixer using derivative superposition method for linearity improvement. The design improvement is proposed in TSMC 0.18-μm CMOS process. The linearity of the designed mixer is further improved using source degeneration inductors at transconductors stage. The measurement results indicate that the proposed method shows the third-order intercept point (IIP3) of 13.5-dBm, which is higher than previously published mixers. The mixer achieves the conversion gain of 2 dBm, and consumes 3.0 mA at 1.8 V power supply. The size of the whole chip is 0.56 mm 2.en_US
dc.language.isoenen_US
dc.publisherJohn Wiley & Sons, Inc.en_US
dc.subjectDerivative superpositionen_US
dc.subjectIIP3en_US
dc.subjectLinearityen_US
dc.subjectTransconductanceen_US
dc.subjectUp-conversion mixeren_US
dc.titleLinearity improvement of 5.2-GHz CMOS up-conversion mixer for wireless applicationsen_US
dc.typeArticleen_US
dc.contributor.urlsohiful@unimap.edu.myen_US
dc.contributor.urlmukhzeer@unimap.edu.myen_US
dc.contributor.urlkanaya@ed.kyushu-u.ac.jpen_US
dc.contributor.urlyoshida@ed.kyushu-u.ac.jpen_US


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