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    Modelling RTN and BTI in nanoscale MOSFETs from device to circuit: a review

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    Modelling RTN and BTI in nanoscale MOSFETs from device to circuit.pdf (176.9Kb)
    Date
    2014-04
    Author
    Louis, Gerrer
    Ding, J.
    Amoroso, S. M.
    Adamu-Lema, F.
    R., Hussin
    Reid, D.
    Millar, C.
    Asenov, A.
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    Abstract
    In this paper we summarize the impact of Statistical Variability (SV) on device performances and study the impact of oxide trapped charges in combination with SV. Traps time constants are described and analysed in combination with SV and time dependent simulations are performed including SV, random traps and charge injection stochasticity. Finally we demonstrate the necessity of statistical simulations in extracting compact models of aged devices and we address the problem of aged SRAM cell reliability.
    URI
    http://dspace.unimap.edu.my:80/dspace/handle/123456789/35523
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