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dc.contributor.authorMohd Khairuddin Md Arshad
dc.contributor.authorUda Hashim
dc.contributor.authorMuzamir Isa
dc.date.accessioned2008-12-23T01:06:49Z
dc.date.available2008-12-23T01:06:49Z
dc.date.issued2007
dc.identifier.citationInternational Journal of Mechanical and Material Engineering, vol. 2 (1), 2007, pages 48-54.en_US
dc.identifier.urihttp://dspace.unimap.edu.my/123456789/3506
dc.descriptionFull text of this article is also available at http://mechanical.eng.um.edu.my/en_US
dc.description.abstractFlip chip packaging technology has been utilized more than 40 years ago and it still experiencing an explosives growth. This growth is driven by the need for high performance, high volume, better reliability, smaller size and lower cost of electronic consumer products. Wafer bumping is unavoidable process in flip chip packaging, thus, picking the correct bumping technology that is capable of bumping silicon wafer at high yield and a high reliability with lower cost is challenging. This paper discusses the available wafer bumping technologies for flip chip packaging. The discussion will be focused on process assembly, solder ball compatibility, design structure and lastly cost which translated to overall product costs.en_US
dc.language.isoenen_US
dc.publisherDepartment of Mechanical Engineering, University Malayaen_US
dc.subjectFlip chip technologyen_US
dc.subjectWafer bumpingen_US
dc.subjectFlip chip packagingen_US
dc.titleUnder Bump Metallurgy (UBM)-a technology review for flip chip packagingen_US
dc.typeArticleen_US
dc.identifier.urlhttp://mechanical.eng.um.edu.my/


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