Now showing items 1-12 of 12

    • Coherent effect on LOCOS and STI technique for 0.18 µm CMOS technology using Taurus Workbench 

      Wan Shafie Wan Sulaiman (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation) are two isolation techniques used in integrated circuit fabrication. Further device scaling using LOCOS technique is no longer practical for technology ...
    • Design and analysis CMOS Cascode amplifier 

      Che Mohd Amirul Azam Che Mohd Ghani (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-03)
      The design of CMOS cascode amplier is presented which it will constructed with the circuit of current mirror and two transistor are placed in cascode topology. The design need to achieve the value that will meet the ...
    • Design and analysis of low power using Sleepy Stack and Zig-Zag technique 

      Wan Nurul Liyana Wan Zulkefle (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      Now days the design of CMOS becomes greater where the number of transistor in design increased largely. However there are some problem that occurs during the excellent design and the increasing of transistor where the ...
    • Electrical characterization of 0.13 µm NMOS transistor with Retrograde Well and Halo Implant Structure Respectively 

      Anas Redzuan, Mokhtar (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-03)
      This project is about the usage of Technology Computer Aided Design (TCAD) in order to construct NMOS transistor with gate length 0.13 µm. TCAD is use in computer simulation as process modelling and device operation. ...
    • Electrical characterization of 0.13µm CMOS Transistor using TSUPREM-4 and MEDICI 

      Rusnita Rafee (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      Technology CAD (TCAD) refers to the use of computer simulation to model semiconductor processing and device operation. TCAD has two major functions which are process simulation and device simulation. It performs the ...
    • Electrical characterization of 0.15µm CMOS Transistor using TSUPREM-4 and MEDICI 

      Low Pooi Lam (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      Physical and electrical characteristics of 0.153m Complementary Metal Oxide Semiconductor (CMOS) were studied. Fabrications of the devices were done by TSUPREM-4 simulator and electrical characteristics extraction will ...
    • Fabrication and simulation of PNP Bipolar transistor based on Spin On Dopant technique and Electrical characterization 

      Siti Nursyida Azuddin (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      In this project, the fabrication and simulation of pnp transistor was performed. From fabrication process, the electrical characteristic and sheet resistance of the device was observed by 4 point probe measurement. The ...
    • Fabrication Of 50 µm transistor and AlNiAu interconnection process 

      Shaffie Husin (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-03)
      Generally process fabrication transistor will starts by cleaning the wafer, formation region drain, D and source, S, get oxide and deposited aluminum as contact with the source, drain and gate. Mask is very important thing ...
    • Low Power Multiplier Accumulator (MAC) unit using Multiple Threshold CMOS 

      Tang Fhan Thin (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Recently, there has been an increasing demand for portable, battery-operated devices like cellular phones and notebook computers. Scaling causes sub-threshold leakage currents to become a large component of total power ...
    • Low Power Multiplier Accumulator (MAC) unit using Sleepy Stack technique 

      Aaron Selvam Thangamany (Universiti Malaysia PerlisSchool Of Microelectronic Engineering, 2008-05)
      The main objective of this project is to provide new low power solutions for Very Large Scale Integration (VLSI) designers. Especially, the focus is on leakage power reduction. In this project, a novel circuit structure ...
    • Study in Design of 32 X 4Bit Static Random Access Memory (SRAM) 

      Nor Bashariah Muhamad Bakhtiar (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Study in design Static Random Access Memory (SRAM) using Mentor Graphic and simulation process with Eldo simulator. The research made on the operation of six transistors, its advantage over Dynamic Random Access Memory ...
    • The study of the effect of MOS transistor scaling on the critical device parameters 

      Zazurina Abd Rahman (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Since the invention of transistors some 30 years ago, CMOS devices have been scale down aggressively in each technology generations to achieve higher integration density and performance. The device shrinkage allow denser ...