Built-In self-configurable architecture for memristor based memories

Abstract

Memristor is an attractive candidate to replace the present computation and storage devices due to its novel features namely nanoscale size, low power, non-volatility, high compatibility with CMOS, and multi-bit operations. However, the memristor memories need to overcome the design challenges such as process variations, non-deterministic switching characteristics, and unreliable operation. This study suggests a built-in self-configurable architecture to detect the weak (unstable) cells of the memristor-based memories. The proposed techniques were validated by “voltage threshold adaptive memristor” (VTEAM) model by injecting various resistive faults. Additionally, this study presents the necessary mathematical analysis for the methodology. The results confirm that the investigated architecture is capable to differentiate unstable and stable memory cell.