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dc.contributor.authorNavneet, Gupta
dc.contributor.authorHaldiya, Varun
dc.date.accessioned2018-06-08T03:48:19Z
dc.date.available2018-06-08T03:48:19Z
dc.date.issued2018-04
dc.identifier.citationInternational Journal of Nanoelectronics and Materials, vol.11 (2), 2018, pages 119-126en_US
dc.identifier.issn1985-5761 (Printed)
dc.identifier.issn1997-4434 (Online)
dc.identifier.urihttp://dspace.unimap.edu.my:80/xmlui/handle/123456789/53606
dc.descriptionLink to publisher's homepage at http://ijneam.unimap.edu.myen_US
dc.description.abstractThis paper presents a systematic approach of material selection for gate oxide material in Germanium (Ge) based CMOS Devices. Various possible high‐k gate dielectrics that can be stacked with Ge substrates are Al2O3, HfO2, La2O3, Y2O3, ZrO2 and Lu2O3. However, each of the dielectric material has its own advantages and limitations therefore it is important to select the best possible candidate. For this purpose, Technique for Order Preference by Similarity to Ideal Solution (TOPSIS) as a Multiple Attribute Decision Making (MADM) technique is used. Based on the ranking derived from TOPSIS, it is found that La2O3 is the most suitable material, followed by Y2O3 for being used as a gate dielectric in Ge‐based CMOS devices. The proposed result is in good agreement with experimental findings thus justifying the validity of the proposed study.en_US
dc.language.isoenen_US
dc.publisherUniversiti Malaysia Perlis (UniMAP)en_US
dc.subjectMaterial Selectionen_US
dc.subjectGermaniumen_US
dc.subjectTOPSISen_US
dc.subjectHigh‐k Gate Dielectricsen_US
dc.subjectCMOS Devicesen_US
dc.titleHigh‐k Gate Dielectric Selection for Germanium based CMOS Devicesen_US
dc.typeArticleen_US
dc.contributor.urlngupta@pilani.bits‐pilani.ac.inen_US


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