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Now showing items 31-35 of 35
Design of 100nm single-electron transistor (SET) by 2D TCAD simulation
(Institute of Electrical and Electronics Engineering (IEEE), 2006)
One of the great problems in current large-scale integrated circuits (LSIs) is increasing power dissipation in a small silicon chip. Single-electron transistor (SET) which operate by means of one-by-one electron transfer, ...
Alignment mark architecture effect on alignment signal behavior in advanced lithography
(Institute of Electrical and Electronics Engineering (IEEE), 2006)
The downscaling of CMOS technology becomes a challenge to the scanner alignment system since overlay and alignment accuracy becomes tighter. Such a tight overlay requirement requires a very stable alignment performance. A ...
Effect of alignment mark depth on alignment signal behavior in advanced lithography
(Universiti Malaysia Perlis, 2008)
Finding a robust alignment strategy is one of the key evaluations in defining
photolithography process. Alignment is a process to determine how the current pattern is
placed on the wafer. Alignment is done by an optical ...
Silica Titania Optical Thick Film by Multi-spinning Sol-gel process
(Kolej Universiti Kejuruteraan Utara Malaysia, 2006)
Sol-gel process has been used for producing high purity and homogenous optical thin films. A high quality, crack free optical thin film and low processing cost are key success factor for optical applications especially in ...
Nanogap Dielectric Biosensor for label free DNA Hybridization detection
(Universiti Malaysia Perlis, 2007)
Sensors based on nanogap capacitance changes are being developed for genomic and proteomic applications because they offer label-free detection on platforms amenable to high throughput configurations. This paper presents ...