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Title: | SOI Single-Electron Transistors (SET) design and process development |
Authors: | Amiza, Rasmi Mohammad Nuzaihan, Md Nor Uda, Hashim |
Keywords: | Single-electron transistor (SET) Single-electron transistor (SET) -- Design and construction Transistors Litography Electron Beam Lithography (EBL) Lithography, Electron beam |
Issue Date: | 18-May-2005 |
Publisher: | Kolej Universiti Kejuruteraan Utara Malaysia |
Citation: | p.85-90 |
Series/Report no.: | Proceedings of the 1st National Conference on Electronic Design |
Abstract: | Single-electron transistor (SET) is attractive devices to use for large-scale integration. SET can be made very small, dissipate little power, and can measure quantities of charge much faster than MOSFETs. This makes SET would replace field-effect transistor (FET). In this paper, Electron Beam (EBeam) GDS II Editor Software is utilized to design a mask for SOI SET fabrication. This system show promising result producing structure at nanometer scale node. Four masks step are involved namely source/drain & gate mask, Poly-Si gate electrode mask, contact mask, and metallization mask. SOI SET device design with a gate length and gate width of approximately 0.1μm and 0.02μm respectively is generated for fabrication process. In addition, the processes involve in SOI SET fabrication are also discussed. |
Description: | Organized by Kolej Universiti Kejuruteraan Utara Malaysia (KUKUM), 18th - 19th May 2005 at Putra Palace Hotel, Kangar. |
URI: | http://dspace.unimap.edu.my/123456789/7104 |
Appears in Collections: | Conference Papers Uda Hashim, Prof. Ts. Dr. |
Files in This Item:
File | Description | Size | Format | |
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SOI Single-Electron Transistors (SET) Design and Process Development.pdf | 177.26 kB | Adobe PDF | View/Open |
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