Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/10461
Title: High efficiency, good linearity, and excellent phase linearity of 3.1-4.8 GHz CMOS UWB PA with a current-reused technique
Authors: Sohiful Anuar, Zainol Murad
Pokharel, R. K.
Sapawi, R.
Kanaya, H.
Yoshida, K.
sohiful@unimap.edu.my
murad@yossvr3.ed.kyushu-u.ac.jp
Keywords: Current-reused
Power added efficiency
Power amplifier
Ultra wideband
Issue Date: Aug-2010
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Citation: IEEE Transactions on Consumer Electronics, vol. 56(3), 2010, pages 1241-1246
Abstract: This paper describes the design of 3.1 to 4.8 GHz CMOS power amplifier (PA) for ultra-wideband (UWB) applications using 0.18-m CMOS technology. The UWB PA proposed here employs cascode topology with a currentreused technique to enhance the gain at the upper end of the desired band, an inter-stage inductor, and a resistive feedback at the second stage to obtain the flatness gain. The measurement results indicated that the input return loss (S11) was less than -5 dB, output return loss (S22) was less than -8 dB, and average power gain of 10.3 dB with a flatness about 0.8 dB. The input 1 dB compression point about -2 dBm and excellent phase linearity (group delay) of ± 135 ps across the whole band were obtained. Moreover, a very high power added efficiency (PAE) of 40.5% at 4 GHz with 50Σ load impedance was achieved with a power consumption of 24- mW.
Description: Link to publisher's homepage at http://ieeexplore.ieee.org/
URI: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5606253
http://dspace.unimap.edu.my/123456789/10461
ISSN: 0098-3063
Appears in Collections:School of Microelectronic Engineering (Articles)

Files in This Item:
File Description SizeFormat 
High efficiency.pdf35.26 kBAdobe PDFView/Open


Items in UniMAP Library Digital Repository are protected by copyright, with all rights reserved, unless otherwise indicated.