Browsing School of Computer and Communication Engineering (FYP) by Subject "Latency"
Now showing items 1-1 of 1
-
Enhance IIR implementation on FPGA using systolic approach for fast processing and better throughput
(Universiti Malaysia Perlis (UniMAP)School of Computer and Communication Engineering, 2015-06)IIR implementation using systolic approach is for executing thickly pipelined bit parallel IIR filter are exhibited. The crucial issue of this project is system latency in sequential execution. Latency means delay between ...