Analysis of flip flop design using nanoelectronic single electron transistor

Abstract

Single Electron Transistor (SET) is a nanoelectronic device that operates under the controlled mode of tunnelled individual electrons. In this paper, a comparative analysis was performed employing SET based D-Flip flop with conventional logic D-flip flop. SET is eminent nanoscale devices that have low power dissipation, high speed and performance. The flip flop design was simulated using SIMON simulator and the stability of its operation was analysed applying the Monte-Carlo method that represented stability with low power dissipation and matched the functionality of traditional CMOS devices.