Fabrication and characterization of 50 nm silicon nano-gap structures

Abstract

A simple method for the fabrication of nano-gaps less than 50 nm by using conventional photolithography combined with patterned-size reduction techniques is presented. Silicon material is used to fabricate the nano-gap structure and gold is used for the electrode. Two chrome masks are proposed to complete this work, the first mask for the nano-gap pattern and a second mask for the electrode. The method is based on the control of the coefficients (temperature and time) with an improved pattern size resolution by thermal oxidation. With this technique, there are no principal limitations to fabricating nanostructures with different layouts down to several nanometers in dimension. In this work, the proposed method is experimentally demonstrated by preparing the nano-gaps on a Si-SiO2 substrate down to dimensions of 50 nm. The optical characterization that is applied to check the nano-gap structure is by using the scanning electron microscope (SEM).