Browsing Journal Articles by Subject "Multipliers (Mathematical analysis)"

Now showing items 1-2 of 2

    • A high speed and well-structured partial product generator for parallel multiplier 

      Rizalafande, Che Ismail; Beckett, P (Univerisiti Malaysia Perils, 2007)
      Previously reported multiplication algorithms mainly focus on rapidly reducing the partial product rows down to final sums and carries used for the final accumulation. In this paper, an efficient approach for partial product ...

    • Improved booth encoding for reduced area multiplier 

      Hussin, R.; Ali Yeon, Md Shakaff; Idris, N.; Ismail, R.C.; Kamarudin, A. (Institute of Electrical and Electronics Engineering (IEEE), 2006-12)
      In designing high density circuit, size is a major concern in design. This paper presents a simple modification to the Booth Multiplier that can effectively reduce the area with an accepted scarified in speed. A conventional ...