Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/41804
Title: Design and implementation of embedded concurrent multiply-accumulate (MAC) functional units on FPGA for fast processing and accurate throughput
Authors: Mohd Azuan, Md Akhir
Dr. Muataz Hameed Salih Al-Doori
Keywords: Multiplier-accumulator (MAC)
Digital signal processing (DSP)
Embedded concurrent Multiply- Accumulate (MAC)
Issue Date: Jun-2015
Publisher: Universiti Malaysia Perlis (UniMAP)
Abstract: Nowadays, high speed unit MAC is the best needs of Very-large-scale integration digital systems and signal processing applications such as Finite impulse response filter, convolution , FFT and other. Application of Digital signal processing, it usually involves a lot of multiplication and accumulation. Thus, high-speed multiplier-accumulator (MAC) has always been an important element for achieving high performance for (DSP) digital signal processing applications [1]. This report is about design and implementation of embedded concurrent Multiply- Accumulate (MAC) Functional Unit on FPGA for Processing and Accurate Throughput.
Description: Access is limited to UniMAP community.
URI: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/41804
Appears in Collections:School of Computer and Communication Engineering (FYP)

Files in This Item:
File Description SizeFormat 
Abstract,Acknowledgement.pdf132.93 kBAdobe PDFView/Open
Introduction.pdf114.36 kBAdobe PDFView/Open
Literature Review.pdf928.18 kBAdobe PDFView/Open
Methodology.pdf685.01 kBAdobe PDFView/Open
Results and Discussion.pdf448.52 kBAdobe PDFView/Open
Conclusion and Recommendation.pdf107.33 kBAdobe PDFView/Open
Refference and Appendics.pdf115.34 kBAdobe PDFView/Open


Items in UniMAP Library Digital Repository are protected by copyright, with all rights reserved, unless otherwise indicated.