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dc.contributor.authorMohd Azuan, Md Akhir-
dc.date.accessioned2016-06-01T04:09:35Z-
dc.date.available2016-06-01T04:09:35Z-
dc.date.issued2015-06-
dc.identifier.urihttp://dspace.unimap.edu.my:80/xmlui/handle/123456789/41804-
dc.descriptionAccess is limited to UniMAP community.en_US
dc.description.abstractNowadays, high speed unit MAC is the best needs of Very-large-scale integration digital systems and signal processing applications such as Finite impulse response filter, convolution , FFT and other. Application of Digital signal processing, it usually involves a lot of multiplication and accumulation. Thus, high-speed multiplier-accumulator (MAC) has always been an important element for achieving high performance for (DSP) digital signal processing applications [1]. This report is about design and implementation of embedded concurrent Multiply- Accumulate (MAC) Functional Unit on FPGA for Processing and Accurate Throughput.en_US
dc.language.isoenen_US
dc.publisherUniversiti Malaysia Perlis (UniMAP)en_US
dc.subjectMultiplier-accumulator (MAC)en_US
dc.subjectDigital signal processing (DSP)en_US
dc.subjectEmbedded concurrent Multiply- Accumulate (MAC)en_US
dc.titleDesign and implementation of embedded concurrent multiply-accumulate (MAC) functional units on FPGA for fast processing and accurate throughputen_US
dc.typeLearning Objecten_US
dc.contributor.advisorDr. Muataz Hameed Salih Al-Doorien_US
dc.publisher.departmentSchool of Computer and Communication Engineeringen_US
Appears in Collections:School of Computer and Communication Engineering (FYP)

Files in This Item:
File Description SizeFormat 
Abstract,Acknowledgement.pdf132.93 kBAdobe PDFView/Open
Introduction.pdf114.36 kBAdobe PDFView/Open
Literature Review.pdf928.18 kBAdobe PDFView/Open
Methodology.pdf685.01 kBAdobe PDFView/Open
Results and Discussion.pdf448.52 kBAdobe PDFView/Open
Conclusion and Recommendation.pdf107.33 kBAdobe PDFView/Open
Refference and Appendics.pdf115.34 kBAdobe PDFView/Open


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