Design of tool kit for Active Filter Circuit PC-based
Abstract
Filters are circuit that pass selected frequencies while rejecting other frequencies. Active filter use active device such as op-amp combined with passive elements such as resistor, capacitors and inductors. The active devices provide voltage gain, high input impedance, and low output impedance. In addition, active filters have several advantages such as easy to adjust over a wide frequency range. In this project, an active filter circuit’s tool kit has been designed and fabricated on printed circuit board (PCB) that can be use for undergraduate study. This friendly user tool kit also can be interface with laboratory equipment (oscilloscope) for output monitoring and analysis. The student can monitoring a four different filter circuit response like as low pass filter, high pass filter, band pass filter and also band stop filter with replace the output jumper wire to the labeled port on the circuit board. The students also can analysis the different filter response output with replace the component’s value with other desirable value. This tool kit has been proven that can be use to measure the critical frequency of the filter circuit,
quality factor, bandwidth, and gain. This tool kit also can exhibit the filter response
curve with include some calculation again output voltage and input frequency. For
overall, the objective that to use this filter circuit design as a tool kit for undergraduate study has been achieves.
Collections
Related items
Showing items related by title, author, creator and subject.
-
Design a current mirror using body driven technique
Siti Zawana Abdul Rani (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)Current mirror or current source is a one of the key elements in analog circuit design. For high performance analog circuit applications, the accuracy and output impedance are the most important parameters to determine the ... -
The performance study of two genetic algorithm approaches for VLSI Macro-Cell layout area optimization
Hasliza, A. Rahim@Samsuddin; Rahman, A. A A; R. Badlishah, Ahmad; Wan Nur Suryani Firuz, Wan Ariffin; Muhammad Imran, Ahmad (Institute of Electrical and Electronics Engineering (IEEE), 2008)Very large scale integrated (VLSI) design has been the subject of much research since the early 1980s where the VLSI cell placement emerges to be a crucial stage in the chip design. Its area optimization is very important ... -
A genetic algorithm approach to VLSI macro cell non-slicing floorplans using binary tree
Hasliza, A. Rahim@Samsuddin; Ab Rahman, A. A H; Andaljayalakshmi, G.; R. Badlishah, Ahmad; Wan Nur Suryani Firuz, Wan Ariffin (Institute of Electrical and Electronics Engineering (IEEE), 2008-05)This paper proposes an optimization approach for macro-cell placement which minimizes the chip area size. A binary tree method for non-slicing tree construction process is utilized for the placement and area optimization ...