Design and Implementation of a VGA Display Generator Using FPGA

Abstract

This project is an implementation of a VGA display generator, using FPGA device. The goal of this project is to design a simple video image. The image is a square ball shape in red color that bounces up and down the screen of a monitor. This project is using Altera UP2 board, FLEX 10K device. The source code is designed using VHDL language processed using Quartus II Design Software. The output is displayed using a standard VGA monitor with 640 by 480 pixels. The design of this project consists of two sub programs, and one top level entity. All three programs compiled and simulated individually. The first sub program is to generate timing signals for VGA display, the second sub-program is a seven segment display needed to track the vertical motion of the image. Both programs are combined in one entity. The top level entity combines all sub programs, and most importantly it draws the shape of the ball and provides the motion for the ball. Final output produced the targeted result with a red square ball moves vertically up and down the screen, and seven segment display produce a counting in hexadecimal in rapid movement which shows the ball is in motion mode. Overall, this project has reached its objectives.