Browsing by Subject "Silicon nitride"
Now showing items 1-6 of 6
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Compaction optimization of Sn-Cu-Si3N4via powder metallurgy route for composite solder fabrication
(Trans Tech Publications, 2013)The aim of this study was to optimize the compaction process of a composite solder fabricated via powder metallurgy route, before details study were conducted in the next stage. Powder of Sn, Cu and Si3N4 were carefully ... -
Fabrication and characterization of ultra thin Si0₂ for nano devices: surface morphology and electrical study
(Universiti Malaysia Perlis (UniMAP)School of Microelectronic Engineering, 2007)The aim of this research is to fabricate and characterize (optical and electrical) an ultra thin silicon dioxide for sub nano devices. In this research, dry oxidation method using high temperature furnace is chosen to ... -
Mechanical properties of Sn-0.7Cu/Si 3N 4 lead-free composite solder
(Elsevier B.V., 2012-10)The use of reinforcing high performance ceramic particulates in monolithic lead-free solder is one way to improve the service temperature and mechanical behavior of a solder joint. In this study, various compositions of ... -
Mixing optimization of Sn-Cu-Si₃N₄ via powder metallurgy route for composite solder fabrication
(Trans Tech Publications, 2014)The aim of this study was to optimize the mixing process of a composite solder fabricated via powder metallurgy route, before details study were conducted in the next stage. Powder of Sn, Cu and Si₃N₄ were carefully weighted, ... -
Optimization of Nitride deposition process using Taguchi method
(Universiti Malaysia PerlisSchool Of Microelectronic Engineering, 2008-04)The process of plasma enhanced chemical vapor deposition silicon nitride film which is used as barrier layer for the doped oxide in premetal dielectric (PMD) application and optimized using Design of Experiment (DOE) ... -
Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
(Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)A simulation for forming shallow trench isolation (STI) in the integrated circuit (IC) is introduced. Firstly, using the Taurus Workbench-tools, the first silicon oxide layer and a silicon nitride layer are formed ...