FPGA Implementation of Cash Money Register

dc.contributor.advisor	Norhawati Ahmad (Advisor)	en_US
dc.contributor.author	Mohd Shafari Mohamad Dadiri
dc.date.accessioned	2025-10-16T15:42:28Z
dc.date.issued	2007-03
dc.description	Access is limited to UniMAP community.	en_US
dc.description.abstract	Cash money register will record all the sales and help the traders to see with more clearly about their sale. Most sales that have been made will be finish by pressing key “enter” at the keyboard. At the same time, a drawer will come out and this sale will be record in memory. This documentation will cover briefly about cash money register using VHDL source code and will be implementing it in FPGA Board. Also activities during this project run. Besides theories and application, there are also reports and reviews on daily activities given.	en_US
dc.identifier.uri	http://dspace.unimap.edu.my/123456789/1353
dc.identifier.uri	https://dspace.unimap.edu.my/handle/123456789/30782
dc.language.iso	en	en_US
dc.publisher	Universiti Malaysia Perlis	en_US
dc.publisher.department	School of Microelectronic Engineering	en_US
dc.subject	Cash money register	en_US
dc.subject	Field programmable gate arrays	en_US
dc.subject	VHDL (Computer hardware description language)	en_US
dc.subject	FPGA board	en_US
dc.subject	C (Computer program language)	en_US
dc.subject	Very High-Speed Integrated Circuits (VHSIC)	en_US
dc.title	FPGA Implementation of Cash Money Register	en_US
dc.type	Learning Object	en_US