Show simple item record

dc.creatorOng, Chiew Yeong
dc.date2018
dc.date.accessioned2022-12-07T02:03:55Z
dc.date.available2022-12-07T02:03:55Z
dc.identifier.urihttp://dspace.unimap.edu.my:80/xmlui/handle/123456789/77429
dc.descriptionMaster of Science Microelectronic System Design Engineeringen_US
dc.description.abstractIn development of the die stacking interconnection technology, the thermal analysis on stacked dies are commonly engaged in semiconductor products. However, thermal issues are not the main criteria for stack die configuration and thus the combined effects of thermal and mechanical stresses are overlooked during the design of the stacked dies. As there are existence of multiple dies and other materials with different Coefficient of Thermal Expansion (CTE), thermo-mechanical loading and its effect on reliability needs to be studied for optimum the interconnection design and die configuration. The focus in this thesis is a) thermal-mechanical analysis on the wirebond interconnection of stacked die by using element analysis, b) the study of planar bonding of stacked die to improve of interconnection. The investigation is carried by modelling an Insulated-Gate Bipolar Transistor (IGBT) with wirebonds based on an investigation carried out Dudek et al. 2015. This model serves as a basis for comparison. The model undergoes cyclic heating and cooling with a temperature delta of 150K and the stress experienced by the model at the bonding interface between Wirebond and Baseplate is recorded at the of each heating and cooling cycles. The test is repeated using a model IGBT with the wirebond replaced with a planar bond, and the stress results are compared. The results of the thermal modelling matches the model by Dudek et al, showing the viability of the model. Thermomechanical analysis shows stress in the interconnection between wirebond and baseplate is highest at the edges of the interconnection and is the same for the planar bond. The results of the analysis show that the stresses in a stacked die are highest at low temperature. The planar bonding method offers a marked improvement over the wirebond in terms of interconnection stress and thus is a viable for improving the thermo-mechanical stresses in a stacked die.en_US
dc.language.isoenen_US
dc.publisherUniversiti Malaysia Perlis (UniMAP)en_US
dc.rightsUniversiti Malaysia Perlis (UniMAP)en_US
dc.subjectInsulated gate bipolar transistorsen_US
dc.subjectBipolar transistorsen_US
dc.subjectWire bonding (Electronic packaging)en_US
dc.subjectPlanar transistorsen_US
dc.titleThermal-mechanical analysis of bonding pad in insulated gate bipolar transistoren_US
dc.typeThesisen_US
dc.contributor.advisorVithyacharan, Retnasamy, Dr.
dc.publisher.departmentSchool of Microelectronic Engineeringen_US


Files in this item

Thumbnail
Thumbnail
Thumbnail

This item appears in the following Collection(s)

Show simple item record