dc.contributor.author | Tan, Chee Leong | |
dc.contributor.author | Pukhraj, Vaya, Dr. | |
dc.date.accessioned | 2011-09-04T03:36:09Z | |
dc.date.available | 2011-09-04T03:36:09Z | |
dc.date.issued | 2006-06 | |
dc.identifier.citation | The Journal of the Institution of Engineers, Malaysia, vol. 67(2), 2006, pages 61-64 | en_US |
dc.identifier.issn | 0126-513X | |
dc.identifier.uri | http://myiem.org.my/content/iem_journal_2006-177.aspx | |
dc.identifier.uri | http://dspace.unimap.edu.my/123456789/13641 | |
dc.description | Link to publisher's homepage at http://www.myiem.org.my/ | en_US |
dc.description.abstract | This paper presents the design of low noise, variable high gain amplifier for signal conditioning circuit. A cascaded amplifier is
used to improve the gain. A variable resistor is used to adjust the Common Mode Rejection Ratio (CMRR). The proposed amplifier
is built on PCB board. Simulation and experimental results are discussed and compared. The new instrumentation amplifier has
the features like gain up to 10000.0 gain, high linearity, and 106dB CMRR. It also has a low slew rate (0.07 V/ μs) and wide gain
bandwidth product (0.324 X108Hz). | en_US |
dc.language.iso | en | en_US |
dc.publisher | The Institution of Engineers, Malaysia | en_US |
dc.subject | Amplifier | en_US |
dc.subject | Common Mode Rejection Ratio (CMRR) | en_US |
dc.subject | High gain | en_US |
dc.subject | Signal conditioning circuit | en_US |
dc.title | Development of low noise, variable high gain amplifier for signal conditioning circuit | en_US |
dc.type | Article | en_US |
dc.contributor.url | vaya@ums.edu.my | en_US |