Now showing items 1-10 of 10

    • Comparison of Various Barrel Shifter 

      Abg Muhd Zakaria, Abg Abdul Wahed (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-05)
      Barrel shifters are often utilized by embedded digital signal processors and general-purpose processors to manipulate data. This project design alternatives for 16 bit barrel shifters that perform the following function ...
    • Design and Simulation of CMOS Operational Amplifier using Mentor Graphics Tool 

      Jegatheesan Sri Ramalu (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Today’s atmosphere and demands continue to drive operating voltages down, especially for widely used components such as the Operational Amplifier. Some of the motivations driving the market are integration, battery operated ...
    • Electrical characterization of 0.13 µm NMOS transistor with Retrograde Well and Halo Implant Structure Respectively 

      Anas Redzuan, Mokhtar (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-03)
      This project is about the usage of Technology Computer Aided Design (TCAD) in order to construct NMOS transistor with gate length 0.13 µm. TCAD is use in computer simulation as process modelling and device operation. ...
    • Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device 

      Norain Mohd Saad (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-03)
      Since the early days of Very Large Scale Integration (VLSI) era, the scaling of gate oxide thickness has been instrumental in controlling the short channel related effects in state-of-the-art device structure, as MOS gate ...
    • Simulation Of 0.35 Um NMOS Process Based on UniMAP Cleanroom Facilities 

      Izny Atikah Ahmad Fahmi (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-05)
      The Micro Fabrication Cleanroom in University Malaysia Perlis (UniMAp) was completed in December 2003 and was built as a teaching laboratory. The goal of this project is to simulate a 0.35um negative-metal-oxide-semiconductor ...
    • Simulation on Effects of Different Types of Channel/Drain Engineering Structure on MOS Device Performance 

      Norazlina Mohd Amin (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-03)
      This final year project is aimed to analyze the effects of three different types of channel/drain engineering structure on MOS transistor performance. As a project basis, a 0.35μm process recipe from UC Berkeley is used ...
    • Simulation on Parameter and Characteristics Extraction Between Two Simulation Packages (Synopsys and PSpice) 

      Nor Aznin Sakrani (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-03)
      The progress of silicon technologies in the last twenty years has traced the path to the unprecedented revolution of information technologies, which has changed everybody’s lifestyles. Apparently, this has happened with ...
    • Stable 2 Stage CMOS Amplifier 

      Ahmad Zainoldiar, Khalidi (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      In the last few years there has been an effort to integrate electrochemical instrumentation. A critical component of such a system is an amplifier. These projects design a “Stable Two stage CMOS amplifier”. This is achieved ...
    • Study in Design of 32 X 4Bit Static Random Access Memory (SRAM) 

      Nor Bashariah Muhamad Bakhtiar (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Study in design Static Random Access Memory (SRAM) using Mentor Graphic and simulation process with Eldo simulator. The research made on the operation of six transistors, its advantage over Dynamic Random Access Memory ...
    • The study of the effect of MOS transistor scaling on the critical device parameters 

      Zazurina Abd Rahman (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-04)
      Since the invention of transistors some 30 years ago, CMOS devices have been scale down aggressively in each technology generations to achieve higher integration density and performance. The device shrinkage allow denser ...