SOI Single-Electron Transistors (SET) design and process development
Mohammad Nuzaihan, Md Nor
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Single-electron transistor (SET) is attractive devices to use for large-scale integration. SET can be made very small, dissipate little power, and can measure quantities of charge much faster than MOSFETs. This makes SET would replace field-effect transistor (FET). In this paper, Electron Beam (EBeam) GDS II Editor Software is utilized to design a mask for SOI SET fabrication. This system show promising result producing structure at nanometer scale node. Four masks step are involved namely source/drain & gate mask, Poly-Si gate electrode mask, contact mask, and metallization mask. SOI SET device design with a gate length and gate width of approximately 0.1μm and 0.02μm respectively is generated for fabrication process. In addition, the processes involve in SOI SET fabrication are also discussed.
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Credit Suisse estimates (Credit Suisse estimates, 2013)
Amiza, Rasmi (Kolej Universiti Kejuruteraan Utara Malaysia (KUKUM)School of Microelectronic Engineering, 2006-04)Single-electron transistor (SET) is one of the promising nanotechnologies and distinguished by a very small device size and low power dissipation. This project explains the SET mask design, SET process flow development, ...
Samsung (Samsung, 2012)