| dc.contributor.author | Mohd Azuan, Md Akhir | |
| dc.date.accessioned | 2016-06-01T04:09:35Z | |
| dc.date.available | 2016-06-01T04:09:35Z | |
| dc.date.issued | 2015-06 | |
| dc.identifier.uri | http://dspace.unimap.edu.my:80/xmlui/handle/123456789/41804 | |
| dc.description | Access is limited to UniMAP community. | en_US |
| dc.description.abstract | Nowadays, high speed unit MAC is the best needs of Very-large-scale integration
digital systems and signal processing applications such as Finite impulse response filter, convolution , FFT and other. Application of Digital signal processing, it usually involves a lot of multiplication and accumulation. Thus, high-speed multiplier-accumulator (MAC) has always been an important element for achieving high performance for (DSP) digital signal processing applications [1]. This report is about design and implementation of embedded concurrent Multiply- Accumulate (MAC) Functional Unit on FPGA for Processing and Accurate Throughput. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Universiti Malaysia Perlis (UniMAP) | en_US |
| dc.subject | Multiplier-accumulator (MAC) | en_US |
| dc.subject | Digital signal processing (DSP) | en_US |
| dc.subject | Embedded concurrent Multiply- Accumulate (MAC) | en_US |
| dc.title | Design and implementation of embedded concurrent multiply-accumulate (MAC) functional units on FPGA for fast processing and accurate throughput | en_US |
| dc.type | Learning Object | en_US |
| dc.contributor.advisor | Dr. Muataz Hameed Salih Al-Doori | en_US |
| dc.publisher.department | School of Computer and Communication Engineering | en_US |
