dc.contributor.author | Cheng, Khye Lun | |
dc.contributor.author | Neoh, Siew Chin, Dr. | |
dc.date.accessioned | 2013-04-01T03:19:39Z | |
dc.date.available | 2013-04-01T03:19:39Z | |
dc.date.issued | 2012-07-10 | |
dc.identifier.citation | p. 174-177 | en_US |
dc.identifier.isbn | 978-146732688-9 | |
dc.identifier.uri | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6320496 | |
dc.identifier.uri | http://dspace.unimap.edu.my/123456789/24196 | |
dc.description | Link to publisher's homepage at http://ieeexplore.ieee.org | en_US |
dc.description.abstract | Circuit designers often face difficulties and challenges to deal with the complex trade-offs of Analog IC design. Considering such complex trade-offs, optimization of circuit design often requires large amount of time and effort. This paper proposed a Genetic Algorithm (GA)-based optimization model for optimizing the design variables of a 4th order Sallen Key high pass filter. The aims of the design are to maximize the output gain, minimize the pass-band ripple, and achieve the targeted cut-off frequency. The GA is executed in conjunction with the LTSPICE circuit simulation system to assess the filter performance. Overall results satisfied the required design specifications. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.ispartofseries | Proceedings of the 4th Asia Symposium on Quality Electronic Design (ASQED 2012) | en_US |
dc.subject | Genetic algorithm | en_US |
dc.subject | High pass filter | en_US |
dc.subject | Optimization | en_US |
dc.title | Genetic algorithm-based optimization in 4th order Sallen Key high pass filter | en_US |
dc.type | Working Paper | en_US |
dc.contributor.url | scneoh@unimap.edu.my | en_US |