Browsing School of Microelectronic Engineering (FYP) by Subject "Parallel adder -- Design and construction"
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A study of proper integrated circuit (IC) layout techniques for a parallel adder
(Universiti Malaysia Perlis (UniMAP)School of Microelectronic Engineering, 2011-06)This report presents the proper Integrated Circuit (IC) layout techniques for a parallel adder. The layout produced for this parallel adder is presented in this report. In order to design and to get a good layout, ...