Browsing School of Microelectronic Engineering (FYP) by Subject "Local oxidation of silicon (LOCOS)"
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Coherent effect on LOCOS and STI technique for 0.18 µm CMOS technology using Taurus Workbench
(Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation) are two isolation techniques used in integrated circuit fabrication. Further device scaling using LOCOS technique is no longer practical for technology ... -
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation
(Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-03)This project is entitled as semi-recessed LOCOS for CMOS device isolation. Local oxidation (LOCOS) technique is a widely used method for device isolation in semiconductor process integration. It is a simple, cheap yet and ...