Now showing items 1-3 of 3

    • Analysis & design low power multiplier using TSMC 0.18µm CMOS technology 

      Norsaifulrudin Mat Zuki (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      As the advance of VLSI technology, low power design has become an important topic in VLSI design. This project is to design a low power multiplier implemented in mentor graphic tools. Low power multipliers are developed ...
    • Coherent effect on LOCOS and STI technique for 0.18 µm CMOS technology using Taurus Workbench 

      Wan Shafie Wan Sulaiman (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation) are two isolation techniques used in integrated circuit fabrication. Further device scaling using LOCOS technique is no longer practical for technology ...
    • Design and analysis of Floating Point divider 

      Siti Aminah Hussen (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      As the advances of VLSI technology, low power design has become an important topic in VLSI design. Scaling down supply voltage is an effective way for power reduction because of its quadratic relationship to dynamic power. ...