Now showing items 1-6 of 6

    • Analysis & design low power multiplier using TSMC 0.18µm CMOS technology 

      Norsaifulrudin Mat Zuki (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      As the advance of VLSI technology, low power design has become an important topic in VLSI design. This project is to design a low power multiplier implemented in mentor graphic tools. Low power multipliers are developed ...
    • Design and analysis of Floating Point divider 

      Siti Aminah Hussen (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      As the advances of VLSI technology, low power design has become an important topic in VLSI design. Scaling down supply voltage is an effective way for power reduction because of its quadratic relationship to dynamic power. ...
    • Design and analysis of Floating Point multiplier 

      Zariah Asari (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      The most important floating-point representation is defined in IEEE Standard 754, adopted in 1985. This standard was developed to facilitate the portability of programs from one processor to another and to encourage the ...
    • Design and analysis of low power using Sleepy Stack and Zig-Zag technique 

      Wan Nurul Liyana Wan Zulkefle (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      Now days the design of CMOS becomes greater where the number of transistor in design increased largely. However there are some problem that occurs during the excellent design and the increasing of transistor where the ...
    • Design and realization of a high Speed Multiplier Accumulator (MAC) unit for low power applications 

      Mohd Nazri Md Rejab (Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2008-04)
      A fast and energy-efficient multiplier is always needed in electronics industry especially DSP, image processing and arithmetic units in microprocessors. Multiplier is such an important element which contributes substantially ...
    • Low Power Multiplier Accumulator (MAC) unit using Sleepy Stack technique 

      Aaron Selvam Thangamany (Universiti Malaysia PerlisSchool Of Microelectronic Engineering, 2008-05)
      The main objective of this project is to provide new low power solutions for Very Large Scale Integration (VLSI) designers. Especially, the focus is on leakage power reduction. In this project, a novel circuit structure ...