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DC Field | Value | Language |
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dc.contributor.author | Zarimawaty, Zailan | - |
dc.contributor.author | Ramzan, Mat Ayub | - |
dc.contributor.author | Mohd Rosydi, Zakaria | - |
dc.date.accessioned | 2010-08-13T06:18:20Z | - |
dc.date.available | 2010-08-13T06:18:20Z | - |
dc.date.issued | 2009-06-20 | - |
dc.identifier.citation | p.1-4 | en_US |
dc.identifier.uri | http://dspace.unimap.edu.my/123456789/8656 | - |
dc.description | Malaysian Technical Universities Conference on Engineering and Technology organized by Universiti Malaysia Pahang in collaboration with Universiti Tun Hussein Onn Malaysia, Universiti Teknikal Malaysia Melaka & Universiti Malaysia Perlis on June 20th - 22nd, 2009, at MS Garden Hotel, Kuantan, Pahang, Malaysia. | en_US |
dc.description.abstract | The commonly use device concept in memory industry is of floating gate type. In this type of memory, electrons were transferred from the substrate to the floating gate, and vice versa, by tunneling through ultra thin dielectric. The ultra thin dielectric such as thin polycrystalline silicon film has been used in the wide range of applications in the microelectronic industry. In this project however, polycrystalline process is developed for double poly structure in the floating gate device for Flash Memory application. Traditionally, polycrystalline silicon is deposited using Low Pressure Chemical Vapour Deposition (LPCVD) process at temperatures around 600°C to 700°C. Due to unavailability of the LPCVD process in the UniMAP’s fabrication facility, other processing technique has to be employed. Thus the polycrystalline silicon is developed using a process called Plasma Enhanced Chemical Vapour Deposition (PECVD) which has carried out at much lower processing temperature. However this process only capable of producing silicon film in an amorphous state. Further heat treatment known as Solid Phase Crystallization (SPC) is analysis that polycrystalline state has been achieved. The study of polysilicon development is characterized by high power microscope, SEM, FESEM and XRD. However the polysilicon peels off from the substrate during thermal annealing procedure.Further study is required to understand and solve the problem. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Universiti Malaysia Pahang | en_US |
dc.relation.ispartofseries | Proceedings of the Malaysian Technical Universities Conference on Engineering and Technology (MUCEET) 2009 | en_US |
dc.subject | Polycrystalline silicon | en_US |
dc.subject | Amorphous silicon | en_US |
dc.subject | PECVD | en_US |
dc.subject | Malaysian Technical Universities Conference on Engineering and Technology (MUCEET) | en_US |
dc.title | Polysilicon process development for floating gate memory devices | en_US |
dc.type | Working Paper | en_US |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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085-088.pdf | Access is limited to UniMAP community | 418.89 kB | Adobe PDF | View/Open |
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