Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/8424
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dc.contributor.authorSohiful Anuar, Zainol Murad-
dc.contributor.authorPokharel, R. K.-
dc.contributor.authorKanaya, H.-
dc.contributor.authorYoshida, K.-
dc.date.accessioned2010-08-02T02:04:12Z-
dc.date.available2010-08-02T02:04:12Z-
dc.date.issued2010-01-11-
dc.identifier.citationp. 25-28en_US
dc.identifier.isbn978-142445458-7-
dc.identifier.urihttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5422842&tag=1-
dc.identifier.urihttp://dspace.unimap.edu.my/123456789/8424-
dc.descriptionLink to publisher's homepage at http://ieeexplore.ieee.org/en_US
dc.description.abstractThis paper describes the design of a 2.4-GHz CMOS Class E single-ended power amplifier (PA) for wireless applications in TSMC 0.18-μm CMOS technology. The Class E PA proposed in this paper realizes all inductors with bondwires for the higher quality factor to increase PA performance and to reduce chip size. The single-ended topology is employed because most existing components designed to be driven by PAs are single-ended. The cascode topology with a self-biasing technique is used to prevent device stress and to decrease the requirement for additional bond pads. The measurement results indicate that the PA delivers 19.2 dBm output power and 27.8% power added efficiency with 3.3-V power supply into a 50 5 load. The chip area is 0.37 mm2.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.relation.ispartofseriesProceedings of the Silicon Monolithic Integrated Circuits in RF Systems (SiRF) 2010en_US
dc.subjectBondwiresen_US
dc.subjectClass Een_US
dc.subjectOutput poweren_US
dc.subjectPower added efficiencyen_US
dc.titleA 2.4 GHz 0.18-μm CMOS class E single-ended power amplifier without spiral inductorsen_US
dc.typeWorking Paperen_US
Appears in Collections:School of Microelectronic Engineering (Articles)

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