Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/77178
Title: Hardware implementation of RGB to HSL converter using FPGA
Authors: Phak Len, Eh Kan, Dr.
Keywords: Digital images
Image analysis
Field programmable gate arrays
Publisher: Universiti Malaysia Perlis (UniMAP)
Abstract: The RGB (Red, Green, Blue) colour model is the basic colour model and add together to produce full colour range. RGB is unable to produce sufficient information for digital image analysis. The HSL (Hue, Saturation, and Luminance) is another colour model for RGB. HSL is capable to provide other useful information such as colour in degree, saturation of the colour and brightness of colour. These information are useful for image analysis. In this work, the implementation of RGB to HSL mathematic conversion algorithm in FPGA is using VHDL language. FPGA enables parallelism and pipelining capabilities to speed up conversion process of the processing steps and consumes only one cycle. The RGB to HSL equation is implemented by using two methods which are parallel and 7-stages pipeline architectures using VHDL language. Parallel architecture has only one clock period of data latency. These two methods can produce HSL value for each pixel without data latency from 10Hz to 150MHz. The parallel and pipeline architectures for RGB to HSL converter have achieved rate of accuracy with the hardware verification up to 99% and 98%, respectively.
Description: Master of Science in Computer Engineering
URI: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/77178
Appears in Collections:School of Computer and Communication Engineering (Theses)

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