CMOS standby leakage current problems in microcontroller device

Abstract

Microcontrollers are popular devices uses in small electronic applications. The microcontroller device using CMOS logic processing with 3 metal layers and without CMP tools it makes planarization of ILD's become tougher to handle with SOG machine alone. Most low yield happens when planarization of ILD's layer is not consistence. The standby leakage current was suspected from inter metal dielectric thickness and via 2 resist removal process, which cause the metal line shorting. Investigation has been made and our studies have been carried out to determine the root cause for standby leakage current problem which cause the yield to drop. By using AIT scanning machine, FESEM, thickness, solvent optimization, we are able to prove the root cause for one of the yield killer.