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Title: | The memory-less method of generating multiplicative inverse values for S-box in AES algorithm |
Authors: | Siti Zarina, Md Naziri Norina, Idris sitizarina@unimap.edu.my |
Keywords: | AES algorithm Antilog and log values Galois finite field GF(28 Memory-less Multiplicative inverse Substitution box Field programmable gate arrays Cryptography |
Issue Date: | 1-Dec-2008 |
Publisher: | Institute of Electrical and Electronics Engineering (IEEE) |
Citation: | p.1-5 |
Series/Report no.: | Proceedings of the International Conference on Electronic Design (ICED 2008) |
Abstract: | The substitution box (S-box) component is the heart of the Advanced Encryption Standard (AES) algorithm. The S-box values are generated from the multiplicative inverse of Galois finite field GF(28) with an affine transform. There are many techniques of gaining the multiplicative inverse values were proposed. Most of the hardware implementations of S-box were using look-up tables (LUTs) (memory-based) to store the values which employ the largest area in design. In this paper, a software method of producing the multiplicative inverse values, which is the generator of S-box values and the possibilities of implementing the methods in hardware applications will be discussed. The method is using the log and antilog values. The method is modified to create a memory-less value generator in AES hardware-based implementation. The implementation is proposed to embed on limited memory, small-sized FPGA. |
Description: | Link to publisher's homepage at http://ieeexplore.ieee.org |
URI: | http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4786771 http://dspace.unimap.edu.my/123456789/7395 |
ISBN: | 978-1-4244-2315-6 |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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abstract.pdf | 7.51 kB | Adobe PDF | View/Open |
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