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DC Field | Value | Language |
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dc.contributor.author | Kushal, Sreedhar | - |
dc.date.accessioned | 2009-11-18T08:18:18Z | - |
dc.date.available | 2009-11-18T08:18:18Z | - |
dc.date.issued | 2009-10-11 | - |
dc.identifier.citation | p.4B3 1 - 4B3 6 | en_US |
dc.identifier.uri | http://dspace.unimap.edu.my/123456789/7344 | - |
dc.description | Organized by School of Mechatronic Engineering (UniMAP) & co-organized by The Institution of Engineering Malaysia (IEM), 11th - 13th October 2009 at Batu Feringhi, Penang, Malaysia. | en_US |
dc.description.abstract | This paper gives a novel yet convenient technique of configuring a Virtex-5 FPGA device through the Universal Serial Bus(USB) port. The monotonous parallel port configuration using JTAG connectors is overcome by USB-port programming of the FPGA either in C or HDL (Hardware Description Language). A Xilinx Development platform (ML506 Evaluation platform is considered) consisting of the Field Programmable Gate Array (FPGA) populated with an SXT device is initially configured to henceforth being reconfigurable through the USB on reset/power up. The encrypted configuration bit stream arriving at the USB port is first accessed by the onchip USB Controller operating preferably on a standalone mode. The data is then loaded on to the Type-I Compact Flash (CF) storage device (expandable to 8GB) through the System ACE controller. The System ACE MPU port is connected to the FPGA which allows the System ACE Controller to access the Compact Flash Card as a generic FAT File system. The FPGA is finally configured either in Serial/Select MAP modes through the dedicated pins. The reason why USB method is more beneficial is that it is more versatile, and doesn't require JTAG connectors which are scanty. Also, in areas where FPGA programming is done more frequently, USB method eliminates the process of disconnecting and reconnecting the subsequent FPGA boards, since the USB cable can be permanently connected with the respective FPGAs. It is faster to program FPGAs in bulk, also cheaper as the connectors are more costly than the USB cable. | en_US |
dc.description.sponsorship | Technical sponsored by IEEE Malaysia Section | en_US |
dc.language.iso | en | en_US |
dc.publisher | Universiti Malaysia Perlis | en_US |
dc.relation.ispartofseries | Proceedings of the International Conference on Man-Machine Systems (ICoMMS 2009) | en_US |
dc.subject | Field programmable gate arrays | en_US |
dc.subject | Compact flash | en_US |
dc.subject | System ACE controller | en_US |
dc.subject | USB host controller | en_US |
dc.subject | Configurable Logic Block | en_US |
dc.subject | JTAG connector | en_US |
dc.subject | EEPROM | en_US |
dc.subject | Gate array circuits | en_US |
dc.subject | Programmable logic devices | en_US |
dc.title | FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL | en_US |
dc.type | Working Paper | en_US |
dc.contributor.url | kushalsathreya@gmail.com | en_US |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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FPGA configuration on Xilinx.pdf | 240.37 kB | Adobe PDF | View/Open | |
Copyright transfer agreement.pdf | 408.08 kB | Adobe PDF | View/Open |
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