The design of Digital UART by using VHDL

Abstract

UART is acronym for Universal Asynchronous Receiver Transmitter and is used for data communication between two devices. The UART translates between parallel bits and serial bits of data. This means that only one bit can pass through over the single wire at a time. The bit will then be converted back into parallel bytes at the receiver. One way to model the UART is by using VHDL (Very High Speed Integrated circuit Hardware Description Language) that allows us to describe the function of the transmitter and receiver in a more behavioral manner. This paper will focus on the design of UART and how some bits errors can be detected.