Design of a real time modified linear Delta Modulator using TMS 320C6416 DSP processor

Abstract

The paper describes design of a real time modified linear delta modulator for generating toll quality speech at a rate that is about half that of the standard 8 bit PCM encoder. Multirate DSP technique is applied to reduce the bit rate of the delta modulator output, where the initial sampling rate is to be kept high in order to achieve the desired correlation between consecutive samples. The performance of the modified linear delta modulator is evaluated by building an embedded system. The system is being built by using Texas Instruments TMS320C6416 Digital Signal Processor. The DSP, which is operating at 600MHz,32-bits, CODEC which allow transmitting and receiving analog signals and the 256M SDRAM & 512kByte flash memory are used for the embedded system design. An embedded system for standard PCM also built to compare the modified linear delta modulator. Results of the comparison show that the proposed system is attractive in that it provides low bit rate toll quality speech using a much simpler and robust circuitry as compared to the standard PCM system.