Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/42090
Title: Design and implementation of simple softcore processor using multilayer neural network on FPGA for better spatial parallelism
Authors: Suliza, Mohd Salleh
Dr. Muataz Hameed Salih Al-Doori
Keywords: Central Processing Unit (CPU)
Neural Network (NN)
Soft processor cores
Multilayer neural networks
Soft processor cores -- Design and construction
Issue Date: Jun-2015
Publisher: Universiti Malaysia Perlis (UniMAP)
Abstract: This project is the Central Processing Unit (CPU) based on Neural Network (NN). Features such as making its implementation is very challenging and also very expensive, because of the large amount of hardware required. At present, cost reduction and true parallelism is very possibility to use technology such as FPGA remodeling. In this project, a soft processor cores using a multilayer neural networks on FPGA will be designed and implemented. The main reasons for using Neural Networks are as follows. It provides Massive Parallelism. The objective of this project is to design and implement Simple Soft Core Processor using Multilayer Neural Network on FPGA, to increase the processing performance by applying spatial parallelism with lower complexity and to verify design on CAD tool and board level. In this project, the Quartus II 13.1 program was introduced in the design of soft-core processor. The main factor for choosing this software because it is easy to learn and has a rapid development today. On this day, Quartus II 13.1 programming language program is among the most well-known and easy to understand. Soft-core processor in the FPGA implementation is optional software that is increasingly popular in embedded computing systems. There are several important steps that must be implemented to ensure the success of this project. Overall, the project includes the initial research to final analysis. The goals of this project are to develop a soft-core processor using multilayer neural network for better spatial parallelism.
Description: Access is limited to UniMAP community.
URI: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/42090
Appears in Collections:School of Computer and Communication Engineering (FYP)

Files in This Item:
File Description SizeFormat 
Abstract,Acknowledgement.pdf220.13 kBAdobe PDFView/Open
Introduction.pdf180.14 kBAdobe PDFView/Open
Literature Review.pdf531.64 kBAdobe PDFView/Open
Methodology.pdf808.91 kBAdobe PDFView/Open
Results and Discussion.pdf624.41 kBAdobe PDFView/Open
Conclusion and Recommendation.pdf100.18 kBAdobe PDFView/Open
Refference and Appendics.pdf185.71 kBAdobe PDFView/Open


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