Please use this identifier to cite or link to this item:
http://dspace.unimap.edu.my:80/xmlui/handle/123456789/37037
Title: | Asymmetrical Double Gate: significant improvement in ultra-scaled sol mosfet |
Authors: | Mohd Khairuddin, Md Arshad, Dr. Uda, Hashim, Prof. Dr. Noraini, Othman mohd.khairuddin@unimap.edu.my |
Keywords: | International Invention, Innovation & Technology Exhibition (ITEX'14) Silicon-on-Insulator (SOl) SOl MOSFETs Research and innovation |
Issue Date: | May-2014 |
Publisher: | Universiti Malaysia Perlis (UniMAP) |
Series/Report no.: | 25th International Invention, Innovation & Technology Exhibition;;ITEX'14 |
Abstract: | Fully-depletion operation is mandatory requirement for ultra-scaled devices (Le. < 45 nm technology) which only can be achieved either multi-gate (Le. FinFET) or thin body Silicon-on-Insulator (SOl). Thin body SOl offers another interesting feature compared to any other technologies i.e. back-gate biasing. In this invention, we utilize asymmetrical contact from the top which provide improved performance and better controlled of short-channel effects in thin body and thin buried oxide of SOl MOSFETs. |
Description: | Received a Gold medal and in 25th International Invention, Innovation & Technology Exhibition (ITEX'14), 8th-10th May at Kuala Lumpur Convention Centre. |
URI: | http://dspace.unimap.edu.my:80/dspace/handle/123456789/37037 |
Appears in Collections: | Universiti Malaysia Perlis |
Files in This Item:
File | Description | Size | Format | |
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ASYMMETRICAL DOUBLE GATE.pdf | 1.46 MB | Adobe PDF | View/Open |
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