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dc.contributor.authorLouis, Gerrer-
dc.contributor.authorDing, J.-
dc.contributor.authorAmoroso, S. M.-
dc.contributor.authorAdamu-Lema, F.-
dc.contributor.authorR., Hussin-
dc.contributor.authorReid, D.-
dc.contributor.authorMillar, C.-
dc.contributor.authorAsenov, A.-
dc.date.accessioned2014-06-15T13:47:52Z-
dc.date.available2014-06-15T13:47:52Z-
dc.date.issued2014-04-
dc.identifier.citationMicroelectronics Reliability, vol.54 (4), 2014, pages 682–697en_US
dc.identifier.issn0026-2714-
dc.identifier.urihttp://dspace.unimap.edu.my:80/dspace/handle/123456789/35523-
dc.descriptionLink to publisher's homepage at http://www.journals.elsevier.comen_US
dc.description.abstractIn this paper we summarize the impact of Statistical Variability (SV) on device performances and study the impact of oxide trapped charges in combination with SV. Traps time constants are described and analysed in combination with SV and time dependent simulations are performed including SV, random traps and charge injection stochasticity. Finally we demonstrate the necessity of statistical simulations in extracting compact models of aged devices and we address the problem of aged SRAM cell reliability.en_US
dc.language.isoenen_US
dc.publisherElsevieren_US
dc.subjectMOSFETsen_US
dc.subjectStatistical Variability (SV)en_US
dc.titleModelling RTN and BTI in nanoscale MOSFETs from device to circuit: a reviewen_US
dc.typeArticleen_US
dc.identifier.urlhttp://www.sciencedirect.com/science/article/pii/S0026271414000420-
dc.identifier.doi10.1016/j.microrel.2014.01.024-
dc.contributor.urllouis.gerrer@glasgow.ac.uken_US
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