Analysis the role of supply voltage and load capacitor in small-signal MOSFET amplifiers

Abstract

The main objective of this project is to investigate the role of supply voltage and load capacitance in the performance of small-signal MOS amplifier with the PSpice simulation for the Common Source, Common Gate and Common Drain configurations. Particular emphasis has been given to addressing basic issues involving MOSFET amplifiers, rather than modifying the design, and hence standard amplifiers have been considered as the topic of study. The study uncovers that while keeping all other circuit parameters constant, the dc bias voltage (VDD) plays an important role in creating large voltage gain as it sets the condition for the transistor to be in the saturation mode. This is the region of operation of the transistor where linear amplification is achieved. [1] The influence of load capacitor CL has been studied by connecting the output of MOS amplifier to a load. The input impedance of the load circuit is the combination of a capacitance in parallel with a resistance. It is found that the load capacitance is important for determining the frequency range for a constant amplifier gain. In general, the lower the load capacitance, the wider is the midband frequency range. At the high frequency end of the spectrum, the gain drops under the influence of CL, which is consistent with the PSpice simulation results for small-signal amplifiers. At low frequency end of the spectrum, the midband gain decreases because coupling capacitors and bypass capacitors do not act as perfect short circuits.[ 1 ]