Design and analysis CMOS Cascode amplifier

Abstract

The design of CMOS cascode amplier is presented which it will constructed with the circuit of current mirror and two transistor are placed in cascode topology. The design need to achieve the value that will meet the requirement specifications. By using the technology of TSMC 0.35um, we have to consider their value of the parameter such as oxide thickness, channel mobility and permittivity of silicon dioxide. It is important for the design to meet the requirement specifications especially for voltage gain, Av in order to minimize the Miller effect because it will provide a large capacitive load to the driving circuit. In the other hand, a close agreement with the theoritical result is observed. Through the use of the equation, the size of each transistors will be calculated and it will be applied to the circuit. Then, the analysis will begin which we have to make sure all of the transistor are in the saturation region before get the value of the parameter according to the specifications. The knowledge on how the NMOS and PMOS transistor will be operate in the saturation region are important thing in order to achieve our objective. The other parameter that will be considered are frequency response, bandwidth and output resistance. Besides that, the research on how to increase the gain of the circuit also will be done so that it will become a reference to other designer if they want to design a circuit that will produce high voltage gain.