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Browsing by Author F. Salehuddin

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Issue DateTitleAuthor(s)
Jan-2023Taguchi Method for p-MOS threshold voltage optimization with a gate length of 22nmIzwanizam, Yahaya; F. Salehuddin; K. E. Kaharudin; A. H. Afifah Maheran; Micro & Nano Electronics Research Group (MiNE), Faculty of Electronic and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM); afifah@utem.edu.my
Jan-2023Virtual fabrication of 14nm gate length n-Type double gate MOSFETN. H. N. M. Nizam; F. Salehuddin; K. E. Kaharudin; Noor Faizah Z. A; MiNE, Faculty of Electronics and Computer Engineering, Universiti Teknikal Malaysia Melaka (UTeM),; Lincoln University College Main Campus, Wisma Lincoln, No. 12, 14, 16 & 18, Jalan SS 6/12, 47301 Petaling Jaya, Selangor Darul Ehsan,; Faculty of Architecture and Engineering Limkokwing University Inovasi 1-1, Jalan Teknokrat 1/1 63000 Cyberjaya, Selangor; afifah@utem.edu.my
Showing results 1 to 2 of 2