Browsing Uda Hashim, Prof. Ts. Dr. by Issue Date

Now showing items 21-40 of 249

    • Design of 100nm single-electron transistor (SET) by 2D TCAD simulation 

      Amiza, Rasmi; Uda, Hashim; Awang Mat, Abd F (Institute of Electrical and Electronics Engineering (IEEE), 2006)
      One of the great problems in current large-scale integrated circuits (LSIs) is increasing power dissipation in a small silicon chip. Single-electron transistor (SET) which operate by means of one-by-one electron transfer, ...

    • Alignment mark architecture effect on alignment signal behavior in advanced lithography 

      Normah, Ahmad; Uda, Hashim; Mohd Jeffrey, Manaf; Kader Ibrahim, Abdul Wahab (Institute of Electrical and Electronics Engineering (IEEE), 2006)
      The downscaling of CMOS technology becomes a challenge to the scanner alignment system since overlay and alignment accuracy becomes tighter. Such a tight overlay requirement requires a very stable alignment performance. A ...

    • Silica Titania Optical Thick Film by Multi-spinning Sol-gel process 

      Mohamad Zahid, A. Malek; Uda, Hashim; Mat Tamizi, Hj Zainuddin; Ahmad Makarimi, Abdullah; Aishah, Isnin (Kolej Universiti Kejuruteraan Utara Malaysia, 2006)
      Sol-gel process has been used for producing high purity and homogenous optical thin films. A high quality, crack free optical thin film and low processing cost are key success factor for optical applications especially in ...

    • Affordable and Effective Microelectronic Engineering Teaching Package for Undergraduate Programme 

      Uda, Hashim, Prof. Dr.; Zul Azhar, Zahid Jamal, Prof. Dr.; Nur Hamidah, Abdul Halim; Mohammad Nuzaihan, Md Nor (International Exhibition of Inventions, 2006-04-05)
      The package, which is fully designed developed, using KUKUM in house expertise, is the first teaching laboratory that is purposely built for undergraduate microelectronic program in Malaysia.

    • MOS Transistor (Fabricated Using In-House Low Cost Facilities) 

      Uda, Hashim, Prof. Dr.; Zul Azhar, Zahid Jamal, Prof. Dr.; Nur Hamidah, Abdul Halim; Mohammadd Nuzaihan, Mohd Nor; Mohd Sallehudin, Saad; Phang, Keng Chew; Haffiz, Abd Razak; Bahari, Man (Malaysian Invention & Design Society (MINDS), 2006-05-19)
      MOS Transistor is divided into two types: NMOS and PMOS. Majority carrier od NMOS is electrons whereby PMOS is holes. The MOS transistor consists of three regions namely source, drain and gate. Fabrication of MOS transistor ...

    • MOS Transistor Mask Design Using SEM Based E-Beam Lithography 

      Uda, Hashim, Prof. Dr.; Nur Hamidah, Abdul Halim; Mohammad Nuzaihan, Md Nor; Zul Azhar, Zahid Jamal, Prof. Dr. (Malaysian Invention & Design Society (MINDS), 2006-05-19)
      Electron beam lithography (EBL) is one of the alternative tools in transferring micro and nano circuit patterns from design editor to the substrate. EBL is state-of-the-art technology for micro and even to nano feature ...

    • The effects of multiple zincation process on Aluminum Bond Pad surface for Electroless Nickel Immersion Gold deposition 

      Mohd Khairuddin, Md Arshad; Ibrahim, Ahmad; Azman, Jalar; Ghazali, Omar; Uda, Hashim (American Society of Mechanical Engineers (ASME), 2006-09)
      This paper reports the effects of a multiple zincation processon the Al bond pad surface prior to electroless nickel immersion gold deposition. The study of multiple zincation comprises the surface topogtaphy and morphology ...

    • Under Bump Metallurgy (UBM)-a technology review for flip chip packaging 

      Mohd Khairuddin Md Arshad; Uda Hashim; Muzamir Isa (Department of Mechanical Engineering, University Malaya, 2007)
      Flip chip packaging technology has been utilized more than 40 years ago and it still experiencing an explosives growth. This growth is driven by the need for high performance, high volume, better reliability, smaller size ...

    • Effect of alignment mark architecture on alignment signal behavior in advanced lithography 

      Normah, Ahmad; Uda, Hashim; Mohd Jeffery, Manaf; Kader Ibrahim, Abdul Wahab (Universiti Malaya, 2007)
      Alignment mark architecture is divided into two types, which depending on where the mark is defined. Alignment mark that is defined through the contact masking steps is known as contact mark and alignment mark that is ...

    • Designing of masks for quantum dot single electron transistor fabrication using E-beam nanolithography 

      Uda, Hashim; Sutikno, Madnasri; Zul Azhar, Zahid Jamal (Nano Science and Technology Institute, 2007)
      Quantum dot single electron transistor (QD SET) is able to be fabricated through a joint technique of e-beam lithography (EBL), pattern dependent oxidation (PADOX) and high density plasma etching. In this research, we have ...

    • Borophosphosilicate glass (BPSG) reflow characterization for submicron CMOS technology 

      Uda, Hashim; Ramzan, Mat Ayub; Nik Hazura, Nik Hamat (Universiti Kebangsaan Malaysia, 2007)
      This paper involves the planarization of borophosphosilicate glass (BPSG) film using a new recipe for annealing process to improve the borophosphosilicate glass (BPSG) film flatness after reflow. This improvement is for ...

    • Nanogap Dielectric Biosensor for label free DNA Hybridization detection 

      Uda, Hashim; Muhamad Emi Azri, Shohini; Harbant, Singh (Universiti Malaysia Perlis, 2007)
      Sensors based on nanogap capacitance changes are being developed for genomic and proteomic applications because they offer label-free detection on platforms amenable to high throughput configurations. This paper presents ...

    • A simple oxidation technique for quantum dot dimension shrinkage and tunnel barriers generation 

      Madnarski Sutikno; Uda, Hashim, Prof. Dr.; Zul Azhar, Zahid Jamal, Prof. Dr. (Elsevier B.V., 2007-05)
      The tunnel barriers generation and the quantum dot size shrinkage play a significant role in single-electron transistor (SET) fabrication. Because the numerically etch indicators were not found, the technical indicators, ...

    • Quantum Dot Single Electron Transistor Structure Formation Using E-Beam Lithography 

      Uda, Hashim, Prof. Dr.; Zul Azhar, Zahid Jamal, Prof. Dr.; Samsudi, Sakrani, Prof. Dr.; Sutikno, Madnarski (C. I. S. Network, 2007-05-18)
      To achieve room temperature operation of single electron transistor (SET). To form single dot chanted for electron transport in SET via the Coufomb Blockade Oscillation (CBO) phenomenon.

    • Silicon Nanowires 

      Uda, Hashim, Prof. Dr.; Mohammad Nuzaihan, Md Nor; Nur Hamidah, Abdul Halim (Malaysian Invention and Design Society (MINDS), 2007-05-18)
      Silicon Nanowires is a new class of materials that have attracted attention and great research interest in the last few years because of their great potential applications in nanotechnology such as: - nanoelectronic ...

    • A systematic dry etching process for profile control of quantum dots and nanoconstrictions 

      Madnarski, Sutikno; Uda, Hashim; Zul Azhar, Zahid Jamal (Elsevier B.V., 2007-08)
      In essence, quantum dot dimensions and others can be laterally and vertically defined by using either bottom up or top down methods respectively. In fabrication that uses top down method, etch process hold a chief role. ...

    • An estimation of the energy and exergy efficiencies for the energy resources consumption in the transportation sector in Malaysia 

      Saidur, R.; Munavvar, Abdul Sattar; Masjuki, H. H.; Ahmed, S.; Uda, Hashim (Elsevier Ltd., 2007-08)
      The purpose of this work is to apply the useful energy and exergy analysis models for different modes of transport in Malaysia and to compare the result with a few countries. In this paper, energy and exergy efficiencies ...

    • Semiconductor Nanowire 

      Uda, Hashim, Prof. Dr.; Mohammad Nuzaihan, Md Nor; Nur Hamidah, Abdul Halim (Kementerian Pengajian Tinggi Malaysia (KPTM), 2007-08-10)
      Semiconductor Nanowire represents an important and broad class of nanometer scale wire structure. Semiconductor Nanowire is a wire of dimension of the order of a nanometer or 10-9 meters. It is the one thousand times ...

    • Mask Making Process (Positive and Negative Mask) 

      Uda, Hashim, Prof. Dr.; Nur Hamidah, Abdul Halim; Mohamad Nuzaihan, Md Nor; Zul Azhar, Zahid Jamal, Prof. Dr. (Kementerian Pengajian Tinggi Malaysia (KPTM), 2007-08-10)
      Generally, two types of masks are used in MOSFET fabrication; positive mask and negative mask. These resists mask can be used either in lift off process or conventional lithography step depends on the fabrication process ...

    • Quantum Dot Single Electron Transistor: Design and Fabrication 

      Uda, Hashim, Prof. Dr.; Zul Azhar, Zahid Jamal, Prof. Dr.; Samsudi, Sakrani, Prof. Dr.; Madnarski, Sutikno (Kementerian Pengajian Tinggi Malaysia (KPTM), 2007-08-10)
      To achieve room temperature operation of single electron transistor (SET). To form single dot chanted for electron transport in SET via the Coufomb Blockade Oscillation (CBO) phenomenon.