Browsing Final Year Project Papers & Reports by Subject "Verilog HDL"
Now showing items 1-2 of 2
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Develop algorithm for forward clarke transformation
(Universiti Malaysia Perlis (UniMAP)School of Microelectronic Engineering, 2011-06)This project focused on verilog HDL design, simulation and waveform analysis for Forward Clarke Transformation. Forward Clarke Transformation is used to control motors in which it can convert 3 phase to two phase flow ... -
Hardware Implementation of Intelligent Traffic Light Controller
(Universiti Malaysia PerlisSchool of Microelectronic Engineering, 2007-05)Traffic signal controller is playing more and more important roles in modern management and controls of urban traffic to reduce the accident and traffic jam in road. The traffic light controller is a sequential machine ...