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|Title: ||An excellent gain flatness 3.0-7.0 GHz CMOS PA for UWB applications|
|Authors: ||Sohiful Anuar, Zainol Murad|
Pokharel, R. K.
Galal, A. I. A.
|Keywords: ||Cascode;Current-reused;Phase linearity;Power amplifier (PA);Ultra-wideband (UWB);CMOS technology|
|Issue Date: ||Sep-2010|
|Publisher: ||Institute of Electrical and Elctronics Engineering (IEEE)|
|Citation: ||IEEE Microwave and Wireless Components Letters, vol. 20(9), 2010, pages 510-512|
|Abstract: ||This letter presents an excellent gain flatness CMOS power amplifier (PA) for UWB applications at 3.0-7.0 GHz in TSMC 0.18 μm CMOS technology. The UWB PA proposed here employs a current-reused technique to enhance the gain at the upper end of the desired band, a shunt and a series peaking inductors with a resistive feedback at the second stage to obtain the wider and flat gain, while shunt-shunt feedback helps to enhance the bandwidth and improve the output wideband matching. The measurement results indicated that the input return loss S11 less than -6 dB, output return loss S22 less than -7 dB, and excellent gain flatness approximately 14.5 ±0.5 dB over the frequency range of interest. The output 1 dB compression of 7 dBm, the output third-order intercept point (OIP3) of 18 dBm, and a phase linearity property (group delay) of ± 178.5 ps across the whole band were obtained with a power consumption of 24 mW.|
|Description: ||Link to publisher's homepage at http://ieeexplore.ieee.org/|
|Appears in Collections:||School of Microelectronic Engineering (Articles)|
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