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|Title: ||A 1.5 V, 0.85-13.35 GHZ MMIC low noise amplifier design using optimization technique|
|Authors: ||Arjuna, Marzuki|
Ali Yeon, Md. Shakaff, Prof. Dr.
Zaliman, Sauli, Prof. Madya
|Keywords: ||Broadband amplifier;Integrated circuit;Monolithic microwave integrated circuit;Optimization;Power-constrained;Pseudomorphic high electron mobility transistor|
|Issue Date: ||1-Nov-2009|
|Publisher: ||Institution of Electronics and Telecommunication Engineers (IETE)|
|Citation: ||IETE Journal of Research, vol. 55 (6), 2009, p. 309-314|
|Abstract: ||This paper describes how a broadband, 1.5 V, 0.85-13.35 GHz low noise amplifier in 0.15 μm 85 GHz PHEMT process is synthesized to simultaneously meet multiple design specifications such as bandwidth, noise figure, power gain and power consumption. Power-constrained synthesis technique is used to design the broadband amplifier. The simulated peak S21 is 19.8 dB, maximum noise Figure is 2.5 dB, 3-dB bandwidth is 12.5 GHz and power consumption is 73.5 mW. The calculated Figure of merit (FOM) is better than many reported broadband low noise amplifier (LNA).|
|Description: ||Link to publisher's homepage at http://www.jr.ietejournals.org/|
|Appears in Collections:||School of Microelectronic Engineering (Articles)|
Ali Yeon, Md Shakaff, Prof. Dr.
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