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Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/7410

Title: Genetic algorithms for VLSI micro-Cell layout area optimization based on binary tree
Authors: Hasliza A. Rahim@Samsuddin
Ab Al-Hadi, Ab Rahman
R. Badlishah, Ahmad
'Aini Syuhada, Md Zain
M.I., Ahmad
Wan Nur Suryani Firuz, Wan Arrifin
???metadata.dc.contributor.url???: haslizarahim@unimap.edu.my
Keywords: Genetic algorithm;Simple genetic algorithm;Adaptive genetic algorithm;Binary tree;VLSI macro-cell layout
Issue Date: 2-Apr-2008
Publisher: ACTA Press
Series/Report no.: Proceedings of the Advances in Computer Science and Technology (ACST 2008)
Abstract: This paper presents a novel module placement based on genetic algorithm (GA) for macro-cell layouts placement that minimizes the chip area size. A binary tree method for non-slicing tree construction process is utilized for the placement and area optimization of macro-cell layouts in very large scale integrated (VLSI) design. The proposed algorithm have been developed using two types of GA: simple genetic algorithm (SGA) and adaptive genetic algorithm (AGA). The performance comparisons of these two techniques in achieving the optimal results are investigated and analyzed. The robustness of GA is also being examined in order to verify the GA performance stability. Based on the experimental results tested on Microelectronic Center of North Carolina (MCNC) benchmark circuit's data set, it exhibits that both algorithms acquire acceptable performance quality to the slicing floorplan approach. AGA performs better than SGA as it converges faster to the optimal result and obtains better optimum area. However, SGA appears to be more robust than AGA.
Description: Link to publisher's homepage at http://www.actapress.com
URI: http://www.actapress.com/Content_of_Proceeding.aspx?proceedingid=477
http://hdl.handle.net/123456789/7410
ISBN: 978-0-88986-730-7 (CD)
Appears in Collections:Conference Papers
R. Badlishah Ahmad, Prof. Dr.

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