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Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/35233

Title: A Firefly Algorithm approach for routing in VLSI
Authors: Mohd Nasir, Ayob
Ahmad Fariz, Hassan
Abdul Halim, Ismail
Hassrizal, Hassan Basri
Muhamad Safwan, Muhamad Azmi
Amar Faiz, Zainal Abidin
???metadata.dc.contributor.url???: farizhasan@unimap.edu.my
Keywords: Buffer insertion;Firefly algorithm;Interconnect;Routing;Swarm intelligence
Issue Date: 2012
Publisher: IEEE Conference Publications
Citation: p. 43-47
Series/Report no.: Proceeding of Symposium on Computer Applications and Industrial Electronics, (ISCAIE 2012).;
Abstract: Many studies had been conducted in improving the performance of large scale integration circuits that heavily depends on the interconnected routing in the circuits. Strategic choice of wire placement and buffer placement for very large scale integration (VLSI) routing can improve time delay of VLSI circuit. This paper explores the use of Firefly Algorithm in VLSI routing. The location of doglegs is employed to model the firefly that represents the routing solution. The proposed approach is then compared with previous literature for benchmarking. The result indicates that it has a good potential in VLSI routing and can be further extended in future.
Description: Proceeding of The Symposium on Computer Applications and Industrial Electronics, (ISCAIE 2012) at Kota Kinabalu, Malaysia on 3 December 2012 through 4 December 2012. Link to publisher's homepage at http://ezproxy.unimap.edu.my:2080/Xplore/dynhome.jsp?tag=1
URI: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6482066
???metadata.dc.identifier.url???: 10.1109/ISCAIE.2012.6482066
ISBN: 978-146733032-9
Appears in Collections:Mohd Nasir Ayob
Abdul Halim Ismail
Muhamad Safwan Muhamad Azmi
Hassrizal Hassan Basri

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