iRepository at Perpustakaan UniMAP >
Final Year Project Papers & Reports >
School of Computer and Communication Engineering (FYP) >

Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/3120

Title: Fuzzy Logic design using VHDL on FPGA
Authors: Sham Sagaria a/l Marisinapen
???metadata.dc.contributor.advisor???: Najmuddin Mohd Hassan (Advisor)
Keywords: Fuzzy systems;Expert systems (Computer science);Field programmable gate arrays;VHDL (Computer hardware description language);Honeycomb
Issue Date: Apr-2008
Publisher: Universiti Malaysia Perlis
???metadata.dc.publisher.department???: School of Computer and Communication Engineering
Abstract: This fuzzy logic design is to produce 3 outputs from a 7 input. The 7 digital input (3-bits each) is produced from the analogue output of the 7-input honeycomb sensor. The honeycomb sensor receives input from seven sensors which sense light ambient and produces analogue signal to acknowledge the location which receives the highest light ambient. This analogue signal is converted to digital signal and this where the fuzzy logic designs comes. The fuzzy logic receive 7 digital input which provide information on which location the light ambient is high. From this digital input, the fuzzy logic will choose the best behaviour to produce 3 outputs to control the movement of three motors (horizontal, vertical and tilt) which rotates a plate facing the location with the highest light ambient. The fuzzy logic design will produce a 2 output of 3-bits each and 1 output of 4-bits, for each type of movements which it’s MSB represent the direction of the plate rotation and the remaining bits is to indicate the plate rotation degree. The design also should be able to store the current position of the plate to prevent system error on the downstream when it uses the output of this design to rotate the motors. The overall function of this project is to enable reception of maximum sunlight to generate electrical power using solar system.
URI: http://hdl.handle.net/123456789/3120
Appears in Collections:School of Computer and Communication Engineering (FYP)

Files in This Item:

File Description SizeFormat
References and appendix.pdf1.79 MBAdobe PDFView/Open
Conclusion.pdf1.79 MBAdobe PDFView/Open
Results and discussion.pdf1.79 MBAdobe PDFView/Open
Methodology.pdf1.79 MBAdobe PDFView/Open
Literature review.pdf1.79 MBAdobe PDFView/Open
Introduction.pdf1.79 MBAdobe PDFView/Open
Abstract, Acknowledgement.pdf1.79 MBAdobe PDFView/Open
View Statistics

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.


Valid XHTML 1.0! Perpustakaan Tuanku syed Faizuddin Putra, Kampus Pauh Putra, Universiti Malaysia Perlis, 02600, Arau Perlis
TEL: +604-9885420 | FAX: +604-9885405 | EMAIL: rujukan@unimap.edu.my Feedback